There is no system attribute that carries such information, one has not been needed. Gate detail can be reported on from the Library Reports via Library Manager and Report Maker can report gates when run in a Schematic. We can advise further if we understand the application/requirement.
Well, for multi-gate heterogeneous parts (e.g. FPGAs) it's nice to have a line showing gate number out of the total number of gates (e.g. "X of Y", where X is the gate number and Y is the total number of gates). Obviously that makes sense only if numbers are used to denote gates. During schematic check that would help to check if all gates of a given part have been instantiated. Surely if that's not the case it will anyway throw an error during forward-annotation to the layout but having a visual feedback in schematic is nice to have too.
Each gate of a Part has an individual identifier in the form 'IC2-c', which is definable and has display options under Naming in Design Settings. All gates can be identified within the schematic design very easily through use of the Component Bin dockable window where unused gates languish until required in the design sheets. Therefore all gates of a Part are instantiated on Insert, this also goes for Insert Connector. There are also various Reports available to ensure gates/pins are not forgotten. Translation to PCB or Synchronise will not be affected because in Pulsonix, all the gates are accounted for.