I would like to suppress unconnected pads and vias in general, but I have some exemptions. For all inner layers, I have Suppress Unconnected Lands for pads and vias checked, but I have a certain pad style that I want to be exempted from this rule.
In chapter Technology - Edit Layer from the online help, it is stated that "[The pad] is suppressed only if there is no explicit pad shape assigned to that layer." So I added explicit pad shapes for every inner layer to that particular pad style. But the pads still vanish for unconnected layers.
Can you explain what the technical requirement is for, regarding the need to un-suppress some pad lands on certain pad stacks rather than have them suppressed like all the others?
Also could you confirm that this is required on a component pad, not a via?
Yes this is only relevant for component pads. It's the other way around. Generally I would like to have the suppression switched off for component pads but on the same pcb is a HV DC-Link, where suppression is beneficial to add a little bit of extra copper in the inner layers. Reading the online help, I thought unsupressing the other pads would be the way to go, but in the end I solved it, by just adjusting the padstack of the DC-Link capacitors. The capacitors are connected by templates in the inner layers, so they don't need annular rings.
Thank you for the explanation. The line "" in the Help for pad suppression simply should not be there, it was a function that was not implemented. However, the requirement for setting no suppression and then overriding certain pads as suppressed and visa-versa has been logged as a suggestion, although it would be complicated by the requirement to be different by layer.
Posted - 08 Aug 2016 : 12:12:48
