Pulsonix Advances PCB Design Technology

• Dual screen support
• Full ECO back to the Schematic from PCB
• Configurable library documenter
• Constraint rules by area creation
• Mapping of multiple PCB pins in component definitions

Tewkesbury, UK – May 6 2009 – Westdev Ltd. – the PCB EDA company delivering technology-leading PCB design solutions today announced the launch of its latest release of Pulsonix, version 6.0. This release offers dual screen support, full ECO back to the Schematic from PCB, a configurable library documenter, constraint rules by area creation and mapping of multiple PCB pins in component definitions.

“The launch of version 6.0 is testament to aggressive on-going development plans that Westdev is adopting for its Pulsonix product line to provide its users with new productivity features”, said Bob Williams, Marketing Director at Westdev. “We have worked closely with our user base to create a product release that is focused and that meets their daily challenges. Yet again, we have included advanced features into our standard product which benefit anyone producing dense PCBs and complex Schematic designs with Pulsonix”.

Major New Features Overview

Dual Screen Support – With the ability to run designs in two different screens, users can benefit from the extra design area available. Communications between the two screens is seamless: cross probing both ways between designs and forward and back annotation of the designs.

Full ECO Back to the Schematic from PCB - Any changes made to the PCB can be reflected back into the Schematic automatically maintaining full design integrity of the project at all times.

Library Documenter – Used to fully document Pulsonix Parts libraries in detail for reference purposes. Graphical representations of all associated footprints, Symbols and Parts are documented along with the Part detail.

Rules By Area - Add design constraints to specific areas of the design to add that extra design dimension when it is required. All rules can be defined and adhered to during the layout process and are fully checked during DRC.

Embedded Views - The embedded views option allows you to create a 'snapshot' of an area of your design.

New Component Body and Clearance Areas - Associated with footprints, these further enhance detailed definition and checking of component areas.

Mapping of Multiple PCB Pins - Where components use common internally connected PCB pins, these can now be easily defined in the Pulsonix Parts definition. Common PCB pins can be shown connected or left as 'implied' (internally connected).

Variant Text & Attributes - When generating complex Variants of your design, you can now add Text, Design Attributes and Text callouts unique to each variant.

Rotate Breakouts by Quadrant in Footprint Wizard – Rotated breakout tracks by quadrant can be defined for fanouts on BGA devices using a new option in the footprint wizard.

Additional Feature Summary Pulsonix V6.0

• Net ‘Class to Class’ constraint rules and checking
• New Pulltight mode available during manual routing
• Net class track length difference check
• Advanced component area rules checking
• Negative text on plotted power-planes
• Alternative thermal rotation rule
• Thermal spoke by area rules
• Case sensitive drill IDs
• Schematic connection 'guides'
• Schematic safe mode added
• Automatic update checking/service patch from Website
• New library check for duplicate items in library
• Layer mapping during import of other EDA designs/Libraries

Pulsonix Overview

Introduced in 2001, Pulsonix EDA software sets the standard for high-performance Schematic design capture, Simulation, PCB layout and autorouting. Developed by a dedicated in-house team, this demonstrates how the fast-growing Pulsonix product is introducing key features to win new business and offer users flexible and highly compatible software that meets the demands of PCB design today.

Further Information

For further information please contact:

Bob Williams
Marketing Director
Westdev Ltd
T. +44 (0) 1684 296 551
E. bobw@pulsonix.com