This tab allows you to setup various aspects of how Schematic and PCB designs interact. In particular during design translation and synchronisation. It is recommended that you set these parameters in the technology files you will be using before you start designing.
Shortcuts
Default Keys: Shift+D
Default Menu: Setup
Command: Design Settings
Locating this option
Available from:
Setup menu > Design Settings option > Synchronisation page
Setup menu > Technology option > Design Settings > Synchronisation page
The Synchronisation Settings pages
There are two different Design Settings dialogs for Synchronisation depending whether you select it from a PCB design or from a Schematic design.
From a PCB design
From a Schematic design
PCB in Safe Mode
The recommended method of modifying the netlist of a design is to perform the changes in the Schematic design and pass the changes to the PCB design using Synchronise Designs.
If you enable PCB driven netlist changes. These changes can be hand fitted back into the Schematic using the report generated from the Synchronise Designs option.
To help prevent you from making accidental netlist changes in the PCB design, check the PCB in Safe Mode box. This makes it illegal to add extra components and alter the nets that component pins are on. Only annotation changes are allowed, which can be Back Annotated to the associated Schematic. In safe mode, after back annotation, the PCB netlist should always match the associated Schematics design.
NOTE: If you put a PCB design that has no corresponding schematic into safe mode, you will not be able to alter the netlist at all.
If you do wish to directly alter the netlist in the PCB, by adding a component for example, you should follow this procedure.
- First synchronise the two designs to ensure they match.
- Take the PCB design out of Safe Mode by checking the Allow Netlist Changes box.
- Enable Backward Design Changes by checking the Allow Update of Schematic to match PCB box for the PCB design.
- Put the Schematic design into safe mode by checking the Schematic in Safe Mode box in it’s General Design Settings dialog.
- Add the component in the PCB design and use Synchronise Designs to update the schematic with the change.
Allow PCB Only single pin nets allows the creation of single pin nets, even if netlist changes are not allowed. When performing Synchronise Designs these single pin nets will be ignored. This is useful for adding test lands or for thermal balancing, where otherwise unconnected pads need to be routed.
These options can be setup in the Schematic, so that the designer can control the changes which the PCB designer can make later on. (The Schematic settings are the defaults passed to the new PCB design, they can still be overridden in the PCB design, if necessary).
Synchronised Design Name
In general, the paired schematic and PCB designs have the same name. However, you can specify a different Name: here, so when using options such as Synchronise Designs, the name specified here will be used instead of the design name. If you empty the name, this will set it back to using the current design name.
Back Annotation
This is a PCB Only Setting
Selecting the Enabled check box allows the PCB design to record Back Annotation information. This information can then be applied to the associated schematic design. If you are not going to use this functionality, you can disable it by unchecking this option.
The is also a Clear History option which will be enabled if you already have back annotation data recorded. This should only be used if you do not wish to retain the back annotation data.
Synchronise with Schematic
These are PCB Only Settings
As part of the Synchronise Designs process, any rules defined in the Schematic are checked against those in the PCB design. With the Apply All Rules Strictly check box checked, any values defined in the master design are passed to the target design. The default for this check box is for it not to be checked, which means that only more restrictive rules are passed to the target. The unchecked option gives some flexibility to the PCB designer to change values as required.
In the Schematic, it is possible to explicitly specify the PCB footprint to be used on a component. In this case, with the Apply Footprint Changes box checked, the footprint specified in the Schematic will be checked and enforced as part of the Synchronise Designs process. If this box is not checked, no checking will be done and the footprint specified in the Schematic is just the default to be used when the component is first added to the PCB.
Net Classes are often used to assign rules to Nets. With the Apply Net Class Changes box checked, the Schematic defines which Net Classes are assigned to which Nets, by unchecking this box, the Net Class assignments in the Schematic only act as a default and changes made in the PCB will be preserved.
Apply Net Colours will cause the Own Colour assignments for Net Names, Differential Pairs, Signal Paths and Sub Nets in the PCB to be synchronised with those defined in the Schematic. This maybe useful for quickly identifying these items in the two designs.
Apply Schematic Track & Via Size Rules to Net Styles will cause Track & Via Size Rules defined in the Schematic to be turned into Net Styles entries in the PCB. Using this, default track sizes can be defined in the Schematic.
Apply Schematic Title & Subject will cause Title and Subject defined in the Document Properties to be synchronised between the Schematic and the PCB.
Use Ignore Attribute White Space if you do not mind attribute values having different spaces or tabs, or leave it unchecked to ensure the values are exactly the same.
Check the Allow Update of Schematic to match PCB box to allow the Synchronise Designs option to work the other way and pass PCB design changes back to the schematic. If this option is enabled you will be asked which design you want to be the master when performing Synchronise. Note: not all changes can be updated in the schematic. For example, deleting a component from within a multiply instanced block.
From the Schematic design
Translate to PCB - Safe Mode
See PCB in Safe Mode above. This setting is applied to the PCB that is created from the schematic.
Schematic in Safe Mode
To help prevent you from making accidental netlist changes in the Schematic design whilst the PCB is the master design being edited, check this box (Schematic in Safe Mode). This makes it illegal to add extra components, alter the nets that component pins are on and make component, net or testpoint annotation changes. It is recommended that the either PCB or the Schematic design should be locked down in Safe Mode at any one time.
When the schematic is in Safe Mode, you can move connected items into the Used section of the Component Bin.
Synchronised Design Name
See Synchronised Design Name above.
Part Status
You can stop Translate To PCB and Synchronise Designs from looking at the Schematic Only status of parts by selecting the Ignore SCM Only Status check box. This means that the process will always attempt to add the component. Note: This is not the recommended way of working and is only present for specific situations when the schematic design is imported from another system and does not need to use the same parts as those in the library.
Other Design Settings
General | Naming (PCB) | Naming (SCM)
Related Topics
Parts Editor | PCB Technology Files | Back Annotate | Synchronise Designs | Translate To PCB