With a Gate selected in the Schematic design, the Import Functional Logic Names option enables you to import Functional Logic Names from your FPGA development system for example, to create and map actual logic names required.
If the import file has pins mapped for more than one gate, but the other gates are not selected, then only pins for the selected gate will be imported. If the import file represents pins for the whole component over multiple gates, then use the Select All Gates option first from the context menu.
Shortcuts
Default Keys: None
Default Menu: None
Command: Import Functional Logic Names
How To Use This Option
With a Gate selected in the Schematic design, right click and select Import Functional Logic Names from the context menu.
The Browse dialog is displayed. From this, select the folder that contains the CSV file.
With the folder selected, the Open dialog is displayed. From this, select the CSV file to import.
It will process the CSV file and if successful, will report with a confirmation dialog. A text report will also be produced if there are any errors.
CSV File Format
The format for the .csv file has just two fields, separated with a comma.
The first line is the header and is ignored on import.
The second and subsequent lines are the Pin Number and new Functional Logic Name (separated with a comma). If a space is used after the comma, this is ignored. The Pin Number can be numerical or alphanumeric.
Pin_Number, Functional_Logic_Name
19, TxD0
21, RxD0
47, MAT1.2
53, MAT1.3
B12, CAP1.3
Y11, RST
Related Topics
Select Mode | Define Functional Logic Names | Select All Gates