The Back Annotation facility is used to transfer PCB design annotation changes back to the host schematic design.
The Back Annotate option on the File menu is available as a ‘one shot’ operation to simply perform the changes to the corresponding Schematic of the same name, or from the Synchronise Designs option where more control is available. For example, you can report possible changes before performing the Back Annotation or choose the Schematic design. You may have renamed the PCB to similar to the Schematic but called it xxx Rev B for example.
This feature can be used for native Pulsonix designs (PCB to SCM) and to back annotate PCB designs that have been created from an external netlist. However, this feature can only be used with particular netlists and not with all netlists imported.
Shortcuts
Default Keys: None
Default Menu: File
Command: Back Annotate
Back Annotation Items
Back Annotation Data can only consist of renames (net, net class, component, testpoint, branch point, differential pairs and signal paths), gate and pin swaps and designated attribute changes, no other change information is passed back.
Use Reports from the Output menu to view a report of the renames and swaps that are waiting to be annotated back to the corresponding Schematic design.
If the Back Annotation icon is greyed out, there are no renames or swaps to back annotate.
Back annotation from imported designs:
PCB designs which were originally imported from another EDA system can also be back annotated. When the Back Annotation option is selected, Pulsonix will know which system the PCB design originally came from and will create a back annotation file for that format e.g. Cadstar files will have a .RIN file created.
When the Back Annotate option is selected a Save As dialog is displayed showing a predefined file name extension relating to the host system.
Checking to see what will be back annotated
If the Back Annotation icon is greyed out, there are no renames or swaps to back annotate.
Use Reports from the Output menu to view the Back Annotation Report to check the waiting annotation changes in the design.
As well as the Back Annotation Report you can also run the Synchronise Designs option. If relevant, this will report that back annotation changes are pending.
How gate and pin swaps are applied to the schematic
Gate swaps are performed by simply swapping the gate modifiers and swapping the corresponding pin numbers on the two gates. The connections are not altered.
Pin swaps are performed within a gate by one of two methods depending on a user preference in the General Options dialog. Both result in the same change to the netlist.
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Swapping the pin names.
This ensures that the connections are not altered. Note: If you wish to change the gate’s pins back to their original order use Reload From Library to reload the part. The connections will then be altered to keep their ends on the re-ordered pins.
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Swapping the connections.
This directly swaps the ends of the connections between the two pins (the same way PCB does).
Attributes
Normally, attribute values on Components, Pads and Nets are driven from the Schematic. However, you can designate an attribute as back annotated, in which case value changes in the PCB will be back annotated to the Schematic.
Caution !!
Once the Back Annotate process has been completed the schematics design has been updated and the rename data removed from the PCB design.
Remember to save the schematic once the back annotation has been performed, otherwise the renames will be lost.
The Back Annotation process can be undone by pressing the Undo button, but it must be undone in both the schematics and PCB designs, otherwise they will not match.
Undoing Back Annotation in the PCB design means the design changes are ready to be applied again.
If this happens, use Synchronise Designs to show the design mismatch.
How do I switch Back Annotation off
If you are just designing using a PCB design and have no corresponding schematic design, you will not want back annotation data building up in the design. Back Annotation can be disabled as follows:
Select the PCB design and use Design Settings from the Setup menu. Select the Design Settings - Synchronisation tab and uncheck the Back Annotation Enabled box. If it is greyed out there must be some changes pending. Press the Clear History button to remove them and then you will be able to disable Back Annotation.
Back Annotation to other systems
If the Pulsonix has been created from a netlist from another system, then the Back Annotation feature can be used to create the formatted files required. The format generated will correspond to the imported netlist format. It should be noted that only certain formats are supported - PADS, Cadstar, Accel
Related Topics
Auto Rename | Auto Swap | Back Annotation Options | Design Settings - Synchronisation | Gate Swap | Pin Swap | Technology - Attributes | Synchronise Designs | Back Annotation Report