Listed alphabetically, there follows a brief description of the built-in reports to be found within the Pulsonix system.
Alternate Pad Styles
Format File: Alternate Pad Styles.rff
Lists the names of all associated parts in the PCB design. Output is split between design level associated parts and associated parts assigned to normal parts.
Associated Parts Only
Format File: Associated Parts.rff
Lists any pads in the PCB design that use Alternate Pad Styles. The format of this report can be modified using the Report Maker.
Back Annotation Report
Command: Back Annotation Report
Lists any PCB annotation changes that are awaiting Back Annotation to the associated schematics design. These changes will be component renames, net renames, gate swaps and pin swaps performed since Back Annotate was last performed.
Bill Of Materials
See the Parts List section on this help page.
Board Area Report
Command: Board Area Report
The board outline area and the area taken up by placed components, on both the top and the bottom side of the PCB design. Included within the Design Status Report.
CAM Report
Command: CAM Report
Lists the CAM Plots set up in the design. Also lists the possible outputs not covered by the set of CAM plots in the report.
Component List Report
Command: Component List Report
Lists the parts used in the design, along with counts of how many components use each part. In PCB counts are given for each side of the design. Included within the Design Status Report.
Connection Length Report
Command: Connection Length Report
Reports the total number of nets and unrouted connections, and reports the total length of unrouted connections and routes in the PCB design. Included within the Design Status Report.
Critical Nets Report
Command: Critical Nets Report
A critical net is defined as one that uses Track Length Rules, Track Length Match Rules or takes part in a Differential Pair, Differential Pair Chain, Signal Path or Sub Net.
This report lists the rules defined for each critical net. For PCB designs, it will report values that are checked against the critical rules and indicate where rules are not obeyed.
Design Status Report
Command: Design Status Report
Collates together most of the specific built-in reports.
PCB design status includes:
Board Area Report
Component List Report
Connection Length Report
Drill Layer Report
Drill List Report
Layer Report
Nets Report
Testpoint Report
Via List Report
Schematics design status includes:
Component List Report
Nets Report
Page Report
Testpoint Report
Panel design status includes:
Panel Size Report
PCB List Report
Panel Only Drill Report
Differential Pairs Report
Command: Differential Pairs Report
Lists all the Differential Pairs in the design, showing the rules defined for each pair.
In a PCB design this report shows the total track lengths and paired track lengths for each completed pin pair. The actual value is shown alongside the required value for each of the rules, indicating where there is an error.
DRC Errors Report
Command: DRC Errors Report
Lists the Design Rule Error markers that are currently in the design. Use the Design Rule Check option to generate these error markers. The markers are listed alphabetically by error type. Use the DRC Errors Browser to view this error list ordered by layer, and to locate error markers within the design.
Drill Layer Report
Command: Drill Layer Report
Lists the Layer Spans from the design technology. These represent the layer pairs that need to be separately drilled. Included within the Design Status Report.
Drill List Report
Command: Drill List Report
Lists all drill sizes that are used in the PCB design. These drill sizes are separated into through-hole, blind and buried sections. For blind and buried layer spans, counts are included of the number of holes for each. Included within the Design Status Report.
Drill Size Table Report
Command: Drill Size Table Report
Lists the drill size table, including the letters associated with each drill size.
ERC Errors Report
Command: ERC Errors Report
Lists the Electrical Rules Error markers that are currently in the design. Use the Electrical Rules Check option to generate these error markers. The markers are listed alphabetically by error type. Use the ERC Errors Browser to view this error list ordered by type, and to locate error markers within the design.
IPC-D-356
Format File: IPC-D-356.rff
Produces an Automated Test data file to the industry standard IPC-D-356 format. The format of this report can be modified using the Report Maker.
IPC-D-356-full
Format File: IPC-D-356-full.rff
Produces an Automated Test data file to the industry standard IPC-D-356 format. This output lists all pads and vias, unlike the basic IPC-D-356 report that only lists testpoints. The format of this report can be modified using the Report Maker.
JTN Netlist
Format File: JTN Netlist.rff
Produces a JTAG boundary scan data file for driving automated test. The format of this report can be modified using the Report Maker.
Layer Report
Command: Layer Report
List of the Layers defined within the technology data in the design.
Library Contents
Format File: Library Contents.rff
Produces a simple list of all the symbols in the library, showing their names, number of pins and last saved date.
Net Completion Report
Command: Net Completion Report
Use this report to find out which nets are complete, and details about nets that are are split, i.e are not fully routed. The report shows the gaps where split nets are incomplete, and lists which nets contain only single pins. Running the Optimise Nets function will show unrouted connections where these split net gaps are.
Net List
Format File: Net List.rff
Produces a formatted ‘generic’ net list. The format of this report can be modified using the Report Maker.
Nets Report
Command: Nets Report
List of the nets in the design.
For PCB designs it reports the number of testpoints, vias, tracks, connections and locked connections for each net, along with the unrouted and routed connection lengths. It also reports the manhattan length for the unrouted connections to give you an estimate of track length needed to route them. The manhattan length is the distance from one end of the connection to the other using just horizontal and vertical lines.
For Schematic designs, for each net it reports the number of testpoints, how many split sub nets the net is made up from, the number of unfinished connections and lists any unconnected pins that have no visible net names. Details of the unfinished nets can be found using the Unfinished Items Report described below.
This report is included within the Design Status Report.
Page Report
Command: Page Report
Simple list of the page names used in the schematics design.
Panel Tab-Routs Report
Format File: Panel Tab-Routs.rff
Reports the coordinates of all of the Tab-Rout shapes in the panel design.
Panel V-Scores Report
Format File: Panel V-Scores.rff
Lists the start and end positions of all of the V-Score lines in the panel design.
Part Details
Format File: Part Details.rff
Produces a report of each Part in the library, showing the detailed information about each part.
Parts List
Format Files:
Parts List.rff
Parts List CSV.rff
BOM Parts List.rff
BOM Parts List CSV.rff
Each of these format files will produces a formatted ‘generic’ parts list. The ‘CSV’ versions of the reports will be suitable for reading into a standard spreadsheet application. The BOM versions report the component names as comma separated name ranges rather than reporting a single component name on each line. The format of these reports can be modified using the Report Maker.
PCB Acceptance Report
Format Files:
PCB Acceptance Report.rff
PCB Acceptance (Database)
This report can be used to sign off a PCB design as passing all acceptance rules. It is a way of collating important reports and running them all at once. The ‘Database’ version shows how to extract field values at runtime from your database when using the Part Database Connection (PDC).
You can define the Acceptance Rule Set for a design using the Design Rule Check option. When run, this report will ask if you wish to run Design Rule Check to recheck the acceptance rules. It will then prompt you for the name of the schematic design to generate a Synchronise Designs report against. It will also run the Net Completion Report, Unfinished Items Report, and Back Annotation Report. All reports will be written to the same output file. The format of this report can be modified to remove or include reports using the Report Maker.
PCB Specification Sheet
Format File: PCB Specification Sheet.rff
This report can be used to document various aspects of board manufacture. Add the following attributes to the design with appropriate values to report the required information:
Board Material
Copper Weight
Material Thickness
PCB Finish
Solder Resist Colour
Silkscreen Top Colour
Silkscreen Bottom Colour
Gold Edge Connector
Add the following attribute to the design with any value to report electronic testing required:
Electronic Test
The format of this report can be modified using the Report Maker.
Pick and Place
Format Files:
Parts List.rff
Parts List CSV.rff
Produces a formatted ‘generic’ report for driving ‘Pick and Place’ component insertion machines. The ‘CSV’ version of this report will be suitable for reading into a standard spread sheet application. The format of this report can be modified using the Report Maker.
Pin Count Report
Command: Pin Count Report
This report gives the total number of Component Pads, Free Pads, Mounting Holes, Testpoints, etc. It also reports the official pin count and pin limit for licensing purposes. Schematic designs are not pin limited, but this reports will give an estimate of the pin count in the resulting PCB design and whether it would exceed the current licensed limit.
Pin Networks Report
Command: Pin Networks Report
Lists all the Pin Networks defined in the design’s technology, along with the networks actually used in the design.
An error will be indicated where the components that make up a pin network instance do not match the parts defined for the pin network in the design’s technology.
In a PCB design this report shows the distance each network component is from it’s master pin, shown alongside the required value for the maximum distance allowed and indicating where there is an error.
Pin Type Rules Report
Command: Pin Type Rules Report
Lists the Pin to Pin Type Rules set up in the Technology dialog.
Power And Ground Report
Commands:
Power And Ground Report
Power And Ground CSV Output
Power table showing all the power and ground component pins in the design. Choose between generating a report, or writing the table to a comma separated values file, suitable for use in a spread sheet application.
Schematic Acceptance Report
Format File: Schematic Acceptance Report.rff
This report can be used to sign off a Schematic design as passing all acceptance rules. It is a way of collating important reports and running them all at once.
You can define the Acceptance Rule Set for a design using the Electrical Rules Check option. When run, this report will ask if you wish to run Electrical Rules Check to recheck the acceptance rules. It will also run the Unfinished Items Report, Nets Report and the Power And Ground Report. All reports will be written to the same output file. The format of this report can be modified to remove or include reports using the Report Maker.
Shortcut Keys Report
Command: Shortcut Keys Report By Command
Command: Shortcut Keys Report By Key
Produces a list of the shortcut keys currently assigned, showing the commands they are assigned to. This list can be sorted by command name or by key.
Star Points Report
Format File: Star Points.rff
This report lists the details of all Star Points in your design.
Stockit For Windows
Format File: Stockit For Windows.rff
This report generates component build data for the Stockit For Windows stock control application. The format of this report can be modified using the Report Maker.
Synchronise Designs Report
Command: Synchronise Designs Report
Performs the Synchronise Designs function to compare associated schematics and PCB designs, but just reports the design differences instead of actually altering any design data. The report will give you a list of changes which would have to be made to the PCB in order to make it match the schematic.
Enter the name of the associated PCB or schematic design to check against.
Technology Report
Command: Technology Report
Reports details of the Styles and Rules defined in the technology data within the design. Does not include the Layers or Layer Span information, which can be found in separate reports.
For a PCB design this also includes a section listing the copper pour templates that have net class overrides.
Testability Report
Command: Testability Report
Lists the nets which do not reach the minimum number of probe points, specified in the Testpoint Rules. The report will also perform a design rule check based on the Acceptance Rule Set and the Testpoint Rules. It reports if the nominated testpoints do not conform with specified Design Rules. It will also list the possible testpoint sites and if they conform to the Design Rules.
Testpoint Report
Command: Testpoint Report
Lists the testpoints defined in the design. The net name, probe side and position of each testpoint is reported. It also indicates which testpoints cannot reach their intended probe side.
Tracks By Layer Report
Command: Tracks By Layer Report
Reports the Track Widths along with the Track Style Names used on each layer.
Unconnected Pins Report
Command: Unconnected Pins Report
Simple list of all component pins that are unused, i.e. are not connected to any nets. The list is alphabetically ordered by component name.
Unfinished Items Report
Command: Unfinished Items Report
Lists the schematics connections or PCB tracks that are unfinished. In PCB a track is unfinished if it is not attached to anything on at least one of its ends. A Schematics connection is unfinished if it is on a net that has less than two component pins, or it is dangling (no item at its end) and has no visible net name at either end, or it is dangling and connected to a bus at the other end.
Ungated Pins Report
Command: Ungated Pins Report
For each component in the design, lists the pins that are not on a schematic symbol within its part. It shows which nets these ungated pins are on.
Variants Report
Format File: Variants Report.rff
Lists all variants and components in a design in a grid format showing which components are fitted in which variant. The format of this report can be modified using the Report Maker.
Via List Report
Command: Via List Report
Reports the total number of through-hole, blind and buried vias in the PCB design. Included within the Design Status Report.
Wire List Report
Format File: Wire List Report.rff
Reports the wires on each net in the design. Each entry shows the position of each end of the wire. The format of this report can be modified using the Report Maker.
Related Topics
Generate Reports | Back Annotate | CAM Plots | DRC Errors Browser | Design Rule Check | ERC Errors Browser | Electrical Rules Check | Pin Type Rules | Track Length Rules | Optimise Nets | Synchronise Designs | Technology